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奇异摩尔官网-核心产品

通用产品和方案    解决专用领域的挑战
基于Chiplet架构、通用互连芯粒、设计工具,及海量第三方芯粒库,
奇异摩尔提供全球领先的Chiplet通用产品解决方案。
客户只需自研部分核心芯粒,复用其他通用单元进行设计组合,
即可快速形成所需专属高性能芯片,极大降低研发成本和设计周期。
同时,通过chiplet超高速互连形成超大规模系统级芯片(M-SOC),
持续提升芯片性能,克服摩尔定律挑战。
Generic Solutions for Specialized World
Kiwimoore provides a world-leading dielets product solution with
Chiplet architecture, interconnect dielets, dedicated design tools,
and a vast library of 3rd-party dielets. Customers only need to
develop core dies, and reuse others for design and combine,
build high-performance chips, maximize R&D costs and shorten
design cycles. Meanwhile, based on ultra-high-speed interconnection
chiplet, enhance ultra-scaling system level, enabling Moore's Law's
next frontier through heterogeneous integration.
高性能通用底座 Base Die
·3D超高速Die2Die ·PCIe、DDR、HBM等高速接口 ·Chiplet片上网络Kiwi Fabric ·自适应互连控制中心
·大容量3D近存 ·大电流供电网络 ·适用于3D Chiplet架构 ·支持3DIC先进封装
High-Performance Base Die
·Compatible with high-performance Chiplets for data center CPU/GPU/AI and autonomous vehicles.
·Great Improves chip performance and reduces R&D cost and cycle·High-performance 3DIC Base Die,
integrated High-Speed interconnect, IO Hub, 3D near-memory, high current power supply, etc.
·Integrated high-speed interfaces (PCIe, DDR/HBM, etc.)
·High-speed interconnect via “Kiwi Fabric-3D”, an internetwork on Chiplet.
·Compatible with 3D chiplet architecture and broadly support Advanced 3DIC Packaging Solutions.
高速互连芯粒 IO Die
·2.xD/2.5D超高速Die2Die ·PCIe、DDR等高速接口 ·Chiplet片上网络Kiwi Fabric ·自适应互连控制中心
·适用于2.xD/2.5DChiplet架构 ·支持Substrate, RDL/Silicon Interposer 等先进封装
High-Speed-IO Die-Kiwi Topup
·Compatible with high-performance Chiplets for data center CPU/GPU/AI and autonomous vehicles.
·Great Improves chip performance and reduces R&D cost and cycle.
·High-Performance Interconnect Hub, multi-Die Chiplet interconnect,
integrating high-speed interfaces including Die2Die, PCIe, DDR, etc.
·High-speed interconnect via “Kiwi Fabric-3D”, an internetwork on Chiplet. Chiplet Network “Kiwi Fabric”
·Compatible with 3D chiplet architecture and broadly support Advanced 3DIC Packaging Solutions (Substrate, RDL/SI Interposer).
Chiplet Die2Die接口IP
·全面支持UCIe标准 ·业界最佳综合性能,高带宽、低功耗、低延时
·全面支持2.xD/2.5D/3D,包括Substrate,RDL/Silicon Interposer,3DIC等 ·含Controller,PHY, verification IP
Die-to-Die Interface IP
·Chiplet-Specific Die2Die IP with Low Latency.
·UCIe Standards Supported.
·Controller, PHY, Verification IP Included.
·Industry-leading integrated performance: High Bandwidth, Low Power & Latency.
·Full Support 2.xD/2.5D/3D Packaging, incl. Substrate, RDL/SI Interposer, 3DIC.
Chiplet软件设计平台
·Chiplet专用设计工具,支持Base Die,IO Die自动完成产品设计
·支持Auto-Rounting,3D-Stacking, Die Configuration等功能
·无缝结合主流EDA工具,快速完 成Chiplet 系统设计、验证、仿真等工作
Chiplet Design Tools - Chiplet Builder
·Automatic Base & IO Die Design tools.
·Auto-Routing, 3D-Stacking, Base die Configuration & More functions.
·Integration with EDA tools, rapidly complete design, verification, simulation, etc.